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Exam Code: PEGAPCLSA86V1

Exam Name: Lead System Architect (LSA) Pega Architecture Exam 86V1

Certification Provider: Pegasystems

Related Certification: Lead System Architect (LSA) Pega Architecture Exam 86V1

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NEW QUESTION: 1
If a system has been tested and only a few defects have been found, what can we conclude about the state of the system? a) The system may be defect free but the testing done cannot guarantee that this is true. b) The system is defect free and further testing would therefore be a waste of resources. c) It depends what the system is designed to do. d) Further testing should be considered but this should be focussed on areas of highest risk because it would not be possible to test everything. e) Testing should be curtailed because it is yielding no value.
A. b, c and d
B. b, c and e
C. a, d and e
D. a, c and d
Answer: D

NEW QUESTION: 2
The definition A relatively small amount (when compared to primary memory) of very high speed RAM, which holds the instructions and data from primary memory, that has a high probability of being accessed during the currently executing portion of a program refers to what category of computer memory?
A. Secondary
B. Real
C. Cache
D. Virtual
Answer: C
Explanation:
Cache logic attempts to predict which instructions and data in main (primary) memory will be used by a currently executing program. It then moves these items to the higher speed cache in anticipation of the CPU requiring these programs and data. Properly designed caches can significantly reduce the apparent main memory access time and thus increase the speed of program execution.
*Answer secondary memory is a slower memory (such as a magnetic disk) that provides non-volatile storage.
*Real or primary memory is directly addressable by the CPU and is used for the storage of instructions and data associated with the program that is being executed. This memory is usually high-speed, Random Access Memory (RAM).
*Answer virtual memory uses secondary memory in conjunction with primary memory to present the CPU with a larger, apparent address space of the real memory locations.


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